Suzhou Electric Appliance Research Institute
期刊號: CN32-1800/TM| ISSN1007-3175

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變電站并聯(lián)電容器電抗率混裝方案及其校驗

來源:電工電氣發(fā)布時間:2016-03-15 10:15 瀏覽次數(shù):844

變電站并聯(lián)電容器電抗率混裝方案及其校驗 

陳玉和1,王宏斌2 
1 南京師范大學,江蘇 南京 210024; 2 江蘇省電力設計院,江蘇 南京 211102 
 

摘 要:變電站并聯(lián)電容器電抗率的選擇主要基于限制涌流、抑制諧波的考慮。提出了電抗率混裝配置方案的簡化計算及校驗方法,并從兼顧諧波抑制及經濟性方面就某具體工程進行了方案比選。結果認為變電站低壓側并聯(lián)電容器電抗率宜采用4.5%(5%)與12%混裝方案,500kV變電站可每臺主變低壓側配置一臺12%電抗率并聯(lián)電容器。
關鍵詞:并聯(lián)電容器;電抗率;諧波
中圖分類號:TM531.4 文獻標識碼:B 文章編號:1007-3175(2013)02-0040-04


Conventional Scheme and Its Calibration of Substation Parallel Capacitor Reactance Rate 

CHEN Yu-he1, WANG Hong-bin2 
1 Nanjing Normal University, Nanjing 210024, China; 2 Jiangsu Electric Power Design Institute, Nanjing 211102, China 
 

Abstract:Selection of substation parallel capacitor reactance rate is basically in consideration of restricting surge current and restraining harmonics. This paper raised a simplified calculation and calibration method of reactance rate conventional disposition. Scheme comparison selection was carried out in concurrent of harmonic restriction and economic aspect from a certain project. The result shows that at substation low-voltage side the conventional scheme which adopted the parallel capacitor reactance rate of 4.5% to 5% combined with that of 12% is suitable. For 500kV substations, a 12% reactance rate parallel capacitor is disposed at each main transformer low-voltage side.
Key words: parallel capacitor; reactance rate; harmonic


參考文獻
[1] GB 50227—2008 并聯(lián)電容器裝置設計規(guī)范[S].
[2] 王星華,余欣梅.電容器組串聯(lián)電抗率優(yōu)化選擇模型和算法研究[J].電力系統(tǒng)保護與控制,2008,36(16):42-47.
[3] 夏長生.電網(wǎng)并聯(lián)電容器裝置電抗率的優(yōu)化設計[D].沈陽:沈陽工業(yè)大學,2008.